\u73fe\u5728\u306e\u3001script.bin \u306e\u5185\u5bb9\u3068\u6bd4\u8f03\u3059\u308b\u3068\u4ee5\u4e0b\u306e\u3088\u3046\u3067\u3059\u3002<\/p>\n
[junkhack@OrangePi BUILD]$ mkdir tmp_boot\n[junkhack@OrangePi BUILD]$ cp -pr \/media\/boot\/* tmp_boot\/\n[junkhack@OrangePi BUILD]$ ll tmp_boot\/\n::\n-rwxr-xr-x 1 501 root 35812 12\u6708 19 14:29 script.bin\n-rwxr-xr-x 1 501 root 10917600 12\u6708 19 14:29 uImage\n[junkhack@OrangePi BUILD]$ \n[junkhack@OrangePi BUILD]$ cp -p .\/sunxi-boards\/sys_config\/h3\/xunlong_orange_pi_pc.fex tmp_boot\/\n[junkhack@OrangePi BUILD]$ cd tmp_boot\/\n\n[junkhack@OrangePi tmp_boot]$ bin2fex script.bin lobo.fex\n\n[junkhack@OrangePi tmp_boot]$ diff -up lobo.fex xunlong_orange_pi_pc.fex > lobo_opipc.patch<\/pre>\n\u9055\u3044\u306f\u4ee5\u4e0b\u306e\u3088\u3046\u3067\u3059\u3002<\/p>\n
—- lobo_opipc.patch<\/p>\n
--- lobo.fex 2016-01-03 04:30:34.000000000 +0900\n+++ xunlong_orange_pi_pc.fex 2016-01-03 04:10:45.000000000 +0900\n@@ -8,7 +8,8 @@ eraseflag = 1\n next_work = 2\n \n [target]\n-boot_clock = 1536\n+#boot_clock = 1008\n+boot_clock = 1200\n storage_type = -1\n \n [key_detect_en]\n@@ -146,7 +147,7 @@ twi_scl = port:PA11<2><default><default>\n twi_sda = port:PA12<2><default><default><default>\n \n [twi1]\n-twi_used = 1\n+twi_used = 0\n twi_scl = port:PA18<3><default><default><default>\n twi_sda = port:PA19<3><default><default><default>\n \n@@ -165,14 +166,14 @@ uart_rx = port:PA05<2><1><default><defau\n [uart1]\n uart_used = 0\n uart_port = 1\n-uart_type = 2\n+uart_type = 4\n uart_tx = port:PG06<2><1><default><default>\n uart_rx = port:PG07<2><1><default><default>\n uart_rts = port:PG08<2><1><default><default>\n uart_cts = port:PG09<2><1><default><default>\n \n [uart2]\n-uart_used = 1\n+uart_used = 0\n uart_port = 2\n uart_type = 4\n uart_tx = port:PA00<2><1><default><default>\n@@ -181,16 +182,16 @@ uart_rts = port:PA02<2><1><default><defa\n uart_cts = port:PA03<2><1><default><default>\n \n [uart3]\n-uart_used = 1\n+uart_used = 0\n uart_port = 3\n-uart_type = 2\n+uart_type = 4\n uart_tx = port:PA13<3><1><default><default>\n uart_rx = port:PA14<3><1><default><default>\n uart_rts = port:PA15<3><1><default><default>\n uart_cts = port:PA16<3><1><default><default>\n \n [spi0]\n-spi_used = 1\n+spi_used = 0\n spi_cs_bitmap = 1\n spi_mosi = port:PC00<3><default><default><default>\n spi_miso = port:PC01<3><default><default><default>\n@@ -209,50 +210,66 @@ spi_miso = port:PA16<2><default><default\n spi_dev_num = 1\n \n [spi_board0]\n-modalias = "spidev"\n+modalias = "m25p32"\n max_speed_hz = 33000000\n bus_num = 0\n chip_select = 0\n mode = 0\n-full_duplex = 1\n-manual_cs = 0\n \n [gpio_para]\n gpio_used = 1\n-gpio_num = 19\n-gpio_pin_1 = port:PL10<1><default><default><0>\n-gpio_pin_2 = port:PA15<1><default><default><1>\n-gpio_pin_3 = port:PA06<1><default><default><0>\n-gpio_pin_4 = port:PA13<1><default><default><0>\n-gpio_pin_5 = port:PA14<1><default><default><0>\n-gpio_pin_6 = port:PD14<1><default><default><0>\n-gpio_pin_7 = port:PA03<1><default><default><0>\n-gpio_pin_8 = port:PC04<1><default><default><0>\n-gpio_pin_9 = port:PC07<1><default><default><0>\n-gpio_pin_10 = port:PC03<1><default><default><0>\n-gpio_pin_11 = port:PA21<1><default><default><0>\n-gpio_pin_12 = port:PA07<1><default><default><0>\n-gpio_pin_13 = port:PA08<1><default><default><0>\n-gpio_pin_14 = port:PG08<1><default><default><0>\n-gpio_pin_15 = port:PA09<1><default><default><0>\n-gpio_pin_16 = port:PA10<1><default><default><0>\n-gpio_pin_17 = port:PG09<1><default><default><0>\n-gpio_pin_18 = port:PG06<1><default><default><0>\n-gpio_pin_19 = port:PG07<1><default><default><0>\n-\n-[led_assign]\n-normal_led = "gpio_pin_2"\n-standby_led = "gpio_pin_1"\n+gpio_num = 30\n+; gpio_pin_1 = port:PL10<1><default><default><1>\n+; gpio_pin_2 = port:PA15<1><default><default><0>\n+gpio_pin_3 = port:PA12<1><default><default><0>\n+gpio_pin_4 = port:PA11<1><default><default><0>\n+gpio_pin_5 = port:PA06<1><default><default><0>\n+gpio_pin_6 = port:PA13<1><default><default><0>\n+gpio_pin_7 = port:PA14<1><default><default><0>\n+gpio_pin_8 = port:PA01<1><default><default><0>\n+gpio_pin_9 = port:PD14<1><default><default><0>\n+gpio_pin_10 = port:PA00<1><default><default><0>\n+gpio_pin_11 = port:PA03<1><default><default><0>\n+gpio_pin_12 = port:PC04<1><default><default><0>\n+gpio_pin_13 = port:PC07<1><default><default><0>\n+gpio_pin_14 = port:PC00<1><default><default><0>\n+gpio_pin_15 = port:PC01<1><default><default><0>\n+gpio_pin_16 = port:PA02<1><default><default><0>\n+gpio_pin_17 = port:PC02<1><default><default><0>\n+gpio_pin_18 = port:PC03<1><default><default><0>\n+gpio_pin_19 = port:PA21<1><default><default><0>\n+gpio_pin_20 = port:PA19<1><default><default><0>\n+gpio_pin_21 = port:PA18<1><default><default><0>\n+gpio_pin_22 = port:PA07<1><default><default><0>\n+gpio_pin_23 = port:PA08<1><default><default><0>\n+gpio_pin_24 = port:PG08<1><default><default><0>\n+gpio_pin_25 = port:PA09<1><default><default><0>\n+gpio_pin_26 = port:PA10<1><default><default><0>\n+gpio_pin_27 = port:PG09<1><default><default><0>\n+gpio_pin_28 = port:PA20<1><default><default><0>\n+gpio_pin_29 = port:PG06<1><default><default><0>\n+gpio_pin_30 = port:PG07<1><default><default><0>\n+\n+;[led_assign]\n+;normal_led = "gpio_pin_2"\n+;standby_led = "gpio_pin_1"\n+\n+[leds_para]\n+leds_used = 1\n+green_led = port:PL10<1><default><default><0>\n+green_led_active_low = 0\n+red_led = port:PA15<1><default><default><0>\n+red_led_active_low = 0\n \n [ths_para]\n ths_used = 1\n-ths_trip1_count = 5\n-ths_trip1_0 = 75\n-ths_trip1_1 = 85\n-ths_trip1_2 = 90\n-ths_trip1_3 = 100\n-ths_trip1_4 = 105\n-ths_trip1_5 = 0\n+ths_trip1_count = 6\n+ths_trip1_0 = 70\n+ths_trip1_1 = 80\n+ths_trip1_2 = 85\n+ths_trip1_3 = 90\n+ths_trip1_4 = 95\n+ths_trip1_5 = 100\n ths_trip1_6 = 0\n ths_trip1_7 = 0\n ths_trip1_0_min = 0\n@@ -264,21 +281,22 @@ ths_trip1_2_max = 3\n ths_trip1_3_min = 3\n ths_trip1_3_max = 4\n ths_trip1_4_min = 4\n-ths_trip1_4_max = 4\n-ths_trip1_5_min = 0\n-ths_trip1_5_max = 0\n+ths_trip1_4_max = 5\n+ths_trip1_5_min = 5\n+ths_trip1_5_max = 5\n ths_trip1_6_min = 0\n ths_trip1_6_max = 0\n ths_trip2_count = 1\n ths_trip2_0 = 105\n \n [cooler_table]\n-cooler_count = 5\n-cooler0 = "1536000 4 4294967295 0"\n+cooler_count = 6\n+cooler0 = "1296000 4 4294967295 0"\n cooler1 = "1200000 4 4294967295 0"\n cooler2 = "1008000 4 4294967295 0"\n-cooler3 = "816000 3 4294967295 0"\n-cooler4 = "504000 1 4294967295 0"\n+cooler3 = "816000 4 4294967295 0"\n+cooler4 = "648000 4 4294967295 0"\n+cooler5 = "480000 1 4294967295 0"\n \n [nand0_para]\n nand_support_2ch = 0\n@@ -316,17 +334,15 @@ hdmi_mode_check = 1\n disp_init_enable = 1\n disp_mode = 0\n screen0_output_type = 3\n-screen0_output_mode = 10\n+screen0_output_mode = 4\n screen1_output_type = 3\n-screen1_output_mode = 10\n+screen1_output_mode = 4\n fb0_format = 0\n fb0_width = 0\n fb0_height = 0\n fb1_format = 0\n fb1_width = 0\n fb1_height = 0\n-fb0_framebuffer_num = 3\n-sunxi_fb_mem_reserve = 32\n \n [hdmi_para]\n hdmi_used = 1\n@@ -340,6 +356,7 @@ tv_dac_src0 = 0\n [pwm0_para]\n pwm_used = 0\n pwm_positive = port:PA05<3><0><default><default>\n+; If set gamc_phy to use = 2\n \n [gmac0]\n gmac_used = 2\n@@ -500,8 +517,8 @@ smc_sda = port:PA08<2><default><default>\n \n [usbc0]\n usb_used = 1\n-usb_port_type = 1\n-usb_detect_type = 0\n+usb_port_type = 2\n+usb_detect_type = 1\n usb_id_gpio = port:PG12<0><1><default><default>\n usb_det_vbus_gpio = port:PG12<0><1><default><default>\n usb_drv_vbus_gpio = port:PL02<1><0><default><0>\n@@ -693,31 +710,54 @@ ir_addr_code12 = 65344\n ir_used = 1\n ir_tx = port:PH07<2><default><default><default>\n \n+;----------------------------------------------------------------------------------\n+; dvfs voltage-frequency table configuration\n+;\n+; pmuic_type:0:none, 1:gpio, 2:i2c\n+; pmu_gpio0: gpio config.\n+; pmu_levelx: 0~9999: voltage(mV), 10000~90000:gpio0 state. voltage form high to low.\n+;\n+; extremity_freq(Hz): cpu extremity frequency when run benckmark or demo apk\n+; 1536MHz@1500mV with radiator, 1296MHz@1340mV without radiator\n+; max_freq: cpu maximum frequency, based on Hz, can not be more than 1200MHz\n+; min_freq: cpu minimum frequency, based on Hz, can not be less than 60MHz\n+;\n+; LV_count: count of LV_freq\/LV_volt, must be < 16\n+;\n+; LV1: core vdd is 1.50v if cpu frequency is (1296Mhz, 1536Mhz]\n+; LV2: core vdd is 1.34v if cpu frequency is (1200Mhz, 1296Mhz]\n+; LV3: core vdd is 1.32v if cpu frequency is (1008Mhz, 1200Mhz]\n+; LV4: core vdd is 1.20v if cpu frequency is (816Mhz, 1008Mhz]\n+; LV5: core vdd is 1.10v if cpu frequency is (648Mhz, 816Mhz]\n+; LV6: core vdd is 1.04v if cpu frequency is (0Mhz, 648Mhz]\n+; LV7: core vdd is 1.04v if cpu frequency is (0Mhz, 648Mhz]\n+; LV8: core vdd is 1.04v if cpu frequency is (0Mhz, 648Mhz]\n+;\n+;----------------------------------------------------------------------------------\n [dvfs_table]\n pmuic_type = 2\n pmu_gpio0 = port:PL06<1><1><2><1>\n pmu_level0 = 11300\n-pmu_level1 = 576\n-extremity_freq = 1536000000\n-max_freq = 1536000000\n-min_freq = 480000000\n+pmu_level1 = 1100\n+max_freq = 1296000000\n+min_freq = 648000000\n LV_count = 8\n-LV1_freq = 1536000000\n-LV1_volt = 1500\n+LV1_freq = 1296000000\n+LV1_volt = 1340\n LV2_freq = 1200000000\n-LV2_volt = 1300\n-LV3_freq = 0\n-LV3_volt = 1100\n-LV4_freq = 0\n+LV2_volt = 1320\n+LV3_freq = 1008000000\n+LV3_volt = 1200\n+LV4_freq = 816000000\n LV4_volt = 1100\n-LV5_freq = 0\n-LV5_volt = 1100\n+LV5_freq = 648000000\n+LV5_volt = 1040\n LV6_freq = 0\n-LV6_volt = 1100\n+LV6_volt = 1040\n LV7_freq = 0\n-LV7_volt = 1100\n+LV7_volt = 1040\n LV8_freq = 0\n-LV8_volt = 1100\n+LV8_volt = 1040\n \n [gpu_dvfs_table]\n G_LV_count = 3\n@@ -797,13 +837,3 @@ din_gpio = port:PD00<1><default><default\n clk_gpio = port:PD01<1><default><default><1>\n stb_gpio = port:PD02<1><default><default><1>\n \n-[mali_para]\n-mali_used = 1\n-mali_clkdiv = 1\n-mali_extreme_freq = 600\n-mali_extreme_vol = 1400\n-\n-[w1_para]\n-w1_used = 1\n-gpio = 20\n-<\/pre>\n\u30d5\u30a1\u30f3\u304c\u306a\u304f\u3066\u3082\u3001\u307e\u3041\u3044\u3044\u3088\u3046\u306b\u30af\u30ed\u30c3\u30af\u30c0\u30a6\u30f3\u3057\u305f\u307b\u3046\u304c\u826f\u3055\u305d\u3046\u3067\u3059\u306d\u3002\u3068\u3044\u3046\u3053\u3068\u3067\u3001fex2bin \u3067\u4f5c\u3063\u305fscript.bin \u3067\u30ea\u30d6\u30fc\u30c8\u3057\u3066\u304a\u304d\u307e\u3057\u305f\u3002\u3057\u3070\u3089\u304f\u3053\u308c\u3067\u69d8\u5b50\u3092\u307f\u308b\u3053\u3068\u306b\u3002<\/p>\n
<\/p>\n
\u25bc\u307e\u3068\u3081<\/p>\n
\u30fbscript.bin \u306f\u3001bin2fex \u3084 fex2bin \u3067\u53d6\u308a\u6271\u3046<\/p>\n
\u30fb\u3053\u308c\u304c\u30d6\u30fc\u30c8\u9818\u57df\u304b\u3089kernel \u306b\u5f15\u304d\u6e21\u3059\u30d1\u30e9\u30e1\u30fc\u30bf\u3092\u6301\u3063\u3066\u3044\u308b\u6a21\u69d8<\/p>\n
\u30fbVDD \u30921.34v\u3067\u6271\u3046LV2 \u304c\u5b89\u5168\u306e\u6a21\u69d8<\/p>\n
\u30fb*.txt \u304b\u3089\u8aad\u307f\u8fbc\u3080\u3088\u3046\u306b\u3059\u308b u-boot \u30a4\u30e1\u30fc\u30b8\u306f\u3069\u3046\u3084\u3063\u3066\u4f5c\u308b\u306e\u304b\uff1f<\/p>\n
\u30fb\u3042\u308b\u3044\u306f\u3001\u4eca\u3067\u3082 kernel \u306b\u6e21\u3059\u65b9\u6cd5\u304c\u3042\u308b\u306e\u304b\u3082\u3002<\/p>\n
\u30fbsunxi \u304b\u3089\u306efex \u30d5\u30a1\u30a4\u30eb\u306b\u306f gpio \u30d4\u30f3\u306e\u30de\u30c3\u30d4\u30f3\u30b0\u3082\u8ffd\u52a0\u5909\u66f4\u3055\u308c\u3066\u3044\u308b\u3088\u3046\u3060<\/p>\n
\u30fb\u30d2\u30fc\u30c8\u30b7\u30f3\u30af\uff0b\u30d5\u30a1\u30f3\u3092\u3064\u3051\u308c\u3070\u300140\u5ea6\u304f\u3089\u3044\u307e\u3067\u30a2\u30a4\u30c9\u30eb\u6642\u306b\u306a\u308b\u3088\u3046\u3067\u3001\u8ca0\u8377\u6642\u306f60\u5ea6\u304f\u3089\u3044\u304b\u306a\uff1f<\/p>\n
\u30fb\u30d5\u30a1\u30f3\u306e\u52b9\u679c\u306f\u7d76\u5927\u3060\u3051\u308c\u3069\u3082\u3001\u3082\u3046\u5c11\u3057\u8a2d\u5b9a\u3092\u4e0b\u3052\u3066\u904b\u7528\u3057\u3088\u3046\u304b\u3068\u601d\u3046\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"
\u3061\u3087\u3063\u3068\u3001orange pi pc \u3067\u4f5c\u696d\u3092\u3057\u3088\u3046\u3068\u601d\u3044\u3001\u30d5\u30a1\u30f3\u306e\u96fb\u6e90\u3092ON\u306b\u3057\u307e\u3057\u305f\u3002 \u3059\u308b\u3068\u3001\u3084\u3063\u3071\u308a\u304b\u306a\u308a\u52b9\u679c\u304c\u3042\u3063\u305f\u3088\u3046\u3067\u300115\u5ea6\u306f\u4e0b\u304c\u3063\u3066\u3044\u307e\u3059\u3002 \u203b\u9014\u4e2d\u3001\u7a7a\u767d\u306a\u306e\u306fmunin \u306e\u8a2d\u5b9a\u5909\u3048\u305f\u3051\u3069\u518d\u8d77\u52d5\u3057\u3066\u306a\u304b\u3063 […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_uag_custom_page_level_css":"","footnotes":""},"categories":[6,47,57,60,63],"tags":[],"acf":[],"uagb_featured_image_src":{"full":false,"thumbnail":false,"medium":false,"medium_large":false,"large":false,"1536x1536":false,"2048x2048":false,"post-thumbnail":false},"uagb_author_info":{"display_name":"JunkHack","author_link":"https:\/\/hack.gpl.jp\/author\/junkhack\/"},"uagb_comment_info":0,"uagb_excerpt":"\u3061\u3087\u3063\u3068\u3001orange pi pc \u3067\u4f5c\u696d\u3092\u3057\u3088\u3046\u3068\u601d\u3044\u3001\u30d5\u30a1\u30f3\u306e\u96fb\u6e90\u3092ON\u306b\u3057\u307e\u3057\u305f\u3002 \u3059\u308b\u3068\u3001\u3084\u3063\u3071\u308a\u304b\u306a…","_links":{"self":[{"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/posts\/1984"}],"collection":[{"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/comments?post=1984"}],"version-history":[{"count":0,"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/posts\/1984\/revisions"}],"wp:attachment":[{"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/media?parent=1984"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/categories?post=1984"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/hack.gpl.jp\/wp-json\/wp\/v2\/tags?post=1984"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}